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For example, if an interrupt from Tl has highest priority, then this is the bit which should be checked first. The simplest way to check the contents of IFR is to shift its contents right or left by one position and check the value of the bit which falls off (into the Carry bit) by testing the carry bit. This technique assigns priorities in a right-to-left or left-to-right manner to the signals of Fig 2-28. Exercise 2-3: Look at Fig 2-28. FR are shifted left by the polling program. Naturally it is also possible to check for combinations of interrupts by checking the values of specific bits in the IFR register.

Whenever the corresponding bit of the data direction register is set to "l" the line connected to the OR will be an output. Whenever the data direction bit is "O", the corresponding line will be an input. The polarity has been chosen so that all lines are iniput when a "reset" is applied. There is an asymmetry in this PIO: Port A is equipped with two OR registers, with and without the handshake feature. Using the PIO Before using the PIO as input or output, the data-direction registers must be loaded with the proper value to configure the corresponding bits of the 1/0 registers as input or output.

Address n will be allocated to CRAl, address n + 1 to CRBl, address n + 2 to CRA2, address n + 3 to CRB3, etc. The program can then make use of the indexed indirect addressing feature and is shown below: START NEXT LOX LOA BMI DEX BEQ BNE 28 #8 (BASE-1,X) SERVICE START NEXT INDEX ACCESS NEXT CR IRQON? X=X-1 THE INPUT OUTPUT CHIPS BASE -WORD -WORD -WORD -WORD -WORD -WORD -WORD -WORD CRA I CRB I CRA 2 CRB 2 CRA 3 CRB 3 CRA4 CRB 4 PORTA PORTB PIO #2 PORTA PORTA PIO #3 PORTA PORTB PIO #4 PORTA PORTB PIO #1 Fig.

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